1. Field of the Invention
The present invention relates to computer systems and more particularly to an enhanced parallel port (EPP) interface which allows for increased performance and bandwidth of a standard parallel port connector while at the same time maintaining compatibility with the existing parallel port interface which includes hardware that enables the software overhead for data transfers to be substantially reduced thus increasing the system performance to enable it to be utilized for bus expansion.
2. Description of the Prior Art
IBM type PC/AT compatible personal computers are provided with a relatively limited number of input/output (I/O) expansion slots to accommodate various I/O devices including additional memory storage devices, tape backup systems, network interface circuits and the like. In order to support a trend of an ever increasing need for expansion capabilities for additional I/O devices, based upon, for example, increased consumer demand for various I/O devices, such as CD-ROMS, various solutions are known. For example, additional I/O devices can be connected to existing expansion slots within personal computers. If existing expansion slots are unavailable, expansion buses are known for providing additional sets of I/O slots. Both IBM type PC/AT compatible and non-compatible (e.g., PCMCIO) expansion buses are known.
With such an arrangement, the addition of the I/O devices, whether supported by existing expansion slots or additional expansion slots created by an expansion bus is relatively cumbersome and generally requires the services of a computer technician which adds to the overall cost of adding an I/O device. In order to avoid such problems, standard parallel ports have been known to be used for expansion capabilities. Although standard parallel ports are undoubtedly the simplest and most cost-effective solution, there are other problems associated with using a parallel port in such an application. More particularly, parallel ports are known to be a relatively slow interface. In particular, parallel ports were developed in the past primarily to support printers whose maximum block transfer rate is about 500 kilobits/sec--assuming no data compression. The block transfer rate is limited by the software overhead required to support data transfers to such devices. For example, 4 to 6 instructions are typically required for transferring data. In particular, a typical transfer may be as follows:
1) write data to data port, PA1 2) assert a strobe signal, PA1 3) check the busy input, PA1 4) if the busy signal is active go to step 3, PA1 5) if the busy signal is inactive clear the strobe, PA1 6) go to step 1 if the block is not transferred.
The problem of relatively slow data transfer through a standard parallel port is not solved by the ever increasing clock speeds of newer IBM type PC/AT compatible computers. In such applications, the number of machine clock cycles per instruction merely increases, thus maintaining generally the same transfer rate.